Wednesday, April 14, 2027. You make coffee, scroll the news. Reuters reports that the Chinese navy has expanded the exercise zone in the Taiwan Strait. Quarantine inspections for cargo ships. No declaration of war, just "routine measures".
Thursday NVDA opens down 22%. Apple down 14. Lloyd's of London suspends war-risk premiums for Taiwan routes, no insurers, no shippers.
Friday you get an email from Apple: your iPhone 18 pre-order is delayed. Expected delivery "Q2 2028".
Saturday Anthropic triples Claude Max prices. "Response to the global GPU shortage." OpenAI follows on Monday.
Sunday evening your portfolio shows minus 38% in the semiconductor cluster. You didn't know your S&P 500 ETF sits roughly 18% in NVIDIA, Apple, and Broadcom[35].
"We're screwed — if TSMC stops."
— my when I started this research. The next three acts test it.
Why does so much hang on this one company?
It isn't one company. Semiconductors is four interlocked playing fields: , , , . At each level one dominant player, no plan B. Four single-source nodes wired in series: ZEISS, ASML, TSMC, Hsinchu. Each node physically depends on the previous one.
| ZEISS SMT | ASML | TSMC | NVIDIA | Intel | |
|---|---|---|---|---|---|
| What they do | Supplies the optics for EUV machinesMirrors and lenses, exclusive to ASML | Builds the lithography machinesEUV and lithography equipment | Makes chips for other companiesPure-play , never designs its own | Designs AI and gaming chips, outsources fab, no own | Designs AND manufactures itself, currently in a painful pivot |
| What makes them special? | 50-picometer polish accuracy on a 30 cm mirror.If the mirror were the size of Germany, no bump would exceed 0.1 mm[△]. Nobody else does this. | Six top-tier technologies in parallel in one machine, 30+ years of R&D moat.Plasma 40× hotter than the sun + ZEISS mirror optics + 100,000-sensor vacuum + nm-precise wafer stage. Anyone trying to copy this has to reinvent 5 of 6 components at HVM quality — patents alone aren't enough. | at N3 ~80%, Samsung ~50%.Apple, NVIDIA, AMD, and Qualcomm fab their leading-edge chips here. Yield gaps in semiconductor history never close in under 5 to 7 years. | Blackwell GPU plus 18 years of CUDA software moat.On hardware AMD MI300 and Intel Gaudi sit roughly level, but fail on CUDA migration. ML code can't be rewritten in 12 months. AI training share stays > 80%. | Currently nothing.18A node (~2nm) in risk production since early 2026, yield 10–15%, external foundry customers < 1%. Success possible, but today Intel sits in this row with no card to play. |
| Business model | Exclusive supplier; ASML holds 24.9% stake, joint R&D roadmap | Equipment monopoly, long order cycles, high margins | Pure-play foundry, high margins via leading-edge premium | Fabless, margins from IP plus CUDA software lock-in | IDM mix; foundry arm as the second leg |
| Leading-edge market share | ~100% EUV optics globally | ~100% EUV machines | ~70% total foundry ~92% at ≤ 5nm logic | > 80% AI training chips | < 1% external foundry, no leading-edge for third parties |
| 2025 revenue | ZEISS group ~€11B SMT segment ~€3B estimated | €32.7B[12] | $122.5B | $215.9B FY26 (Feb 2025 — Jan 2026) | $52.9B weakest year since 2010 |
| Top customers | ASML (exclusive for EUV) | TSMC, Samsung, Intel, SK hynix, Micron | NVIDIA (19%), Apple (17%), AMD, Qualcomm, Broadcom, MediaTek | Microsoft, Meta, Amazon, Google, Oracle, xAI | Own products plus roughly 12 external pilot customers |
| HQ location | Oberkochen, Germany | Veldhoven, Netherlands | Hsinchu, Taiwan | Santa Clara, USA | Santa Clara, USA |
Four tiers, four nodes — if one tips, the chain breaks at that level.
This is where the logic chips for AI, new iPhones, high-end smartphones, and server CPUs sit. Whoever holds this market makes the chips NVIDIA Blackwell, Apple M, and Qualcomm Snapdragon depend on.
DeeperView 2 · Total foundry market (all nodes combined, not just leading edge)
Add up all contract fabs — leading-edge chips, older automotive chips, memory, microcontrollers. TSMC still dominates, but the gap is smaller than at the top. The second tier becomes visible.
Three edges that make TSMC the single point of failure.
The table explains the playing field. It doesn't explain why TSMC is so far out front and why this position isn't an accident. Three hard edges show it.
DeeperWhat's actually inside a modern chip? — walked through with the Apple M3 Max
Take the chip in a current MacBook Pro (the M4/M5 successor is built very similarly). Five facts make clear what kind of scale TSMC is actually working at. The Apple M3 Max is used because the numbers are public[38] — NVIDIA Blackwell is even bigger.
This isn't "computers getting faster". This is hardware at the scale of subatomic structures, running synchronously at femtosecond level — and it has to come out right on the first try. That's exactly why there's only one place on the planet that pulls this off in stable volume.
Edge 01 · YieldAt 50% yield only every second chip comes out fully functional. The rest fail, get sold as a cheaper variant, or end up as waste. Samsung doesn't hit this consistently, TSMC sits well above 80%.
Edge 02 · Customer dependencyApple and NVIDIA basically have no plan B. If TSMC tips, two whole industries tip with it.
Could Apple or NVIDIA fab elsewhere? In theory yes, in practice not within 12 months:
- Chip designs are TSMC-specific. Redesign, re-verification, and re-tape-out at Samsung 3nm cost 3 to 9 months and hundreds of millions of dollars.
- Samsung yields are roughly half. Unit price rises accordingly.
- Worst-case fallback: stay on TSMC Arizona at 4 to 5nm. One or two node generations behind. Performance, battery life, and AI capability take a multi-year hit.
Bonus risk · click to expand is the third node in the chain
TSMC makes the logic chips, ASML supplies the lithography — but modern AI chips need a third critical component: . An NVIDIA Blackwell without HBM is an expensive hotplate.
- SK hynix dominates with roughly 50% market share, Samsung follows at ~35%, Micron just under 15%[16]. All three sit in Asia (South Korea, US plants only for standard DRAM).
- HBM3E and HBM4 are fully booked. NVIDIA has reserved SK hynix' capacity for Blackwell and Rubin through 2026. No slot, no AI GPU — no matter how many wafers TSMC could produce.
- HBM stacks are placed on the logic die via CoWoS packaging. If CoWoS goes down, HBM use goes down. If HBM goes down, all of Blackwell production is dead, even if every other station runs.
So it isn't a pure three-node chain (TSMC, ASML, SK hynix) — any single node can kill the GPU pipeline. But for the main thesis (TSMC + ASML as the single point of failure), HBM is the extra insurance question, not the core.
DeeperWho could replace TSMC? Three candidates — none of them by 2028.
If TSMC is the single point of failure, the second source should sit somewhere. Three candidates qualify in theory: Intel (US, IDM pivot), Samsung Foundry (South Korea), and China's SMIC. For all three, a glance at yield, trust, and equipment is enough to see: none of them replaces TSMC. And while they catch up, TSMC itself is rolling out the next generation.
No candidate replaces TSMC — not by 2028, not by 2030.
- Yield gap: 18A at roughly 10-15% yield (industry estimate, end of 2025). Intel counters with defect density < 0.4 defects/cm², but the gap to TSMC N3 stays substantial.
- Financial damage: Foundry Q4 2025 with $2.5B loss. Group 2025: $52.9B revenue, the weakest year since 2010. Intel Magdeburg first only delayed in September 2024, then cancelled outright in July 2025 (€30B investment, of which €10B was state subsidy)[31].
- IDM trust problem: Apple, NVIDIA, and AMD don't hand Intel critical IP — Intel is simultaneously their competitor in PC and server CPUs.
- Time to parity: 3-5 years and $30-50B more, group strategy under Lip-Bu Tan since March 2025 focused on 14A.
- Yield gap: 3nm yield around 50% versus TSMC ~90% (TrendForce May 2025[3]). 40 percentage points behind at the decisive generation.
- Market share: 7.2% foundry total, single-digit at leading-edge ≤ 3nm. Tesla mega-deal $16.5B for AI6 chips through 2033 (Samsung makes AI6, TSMC makes AI5) stabilizes utilization[30].
- Captive bias: 3nm is now used almost only for Samsung's own chips. External customers (Qualcomm, Google, NVIDIA Blackwell) switched to TSMC.
- Time to parity: 2-3 years in theory, but unlikely — trust and yield are missing at the same time.
- Yield gap: 5nm yield around 33%, 5nm wafers ~50% more expensive than at TSMC.
- Equipment ban: No EUV machines due to US export controls. DUV works, but is very inefficient.
- Own equipment build: SMEE EUV prototype shown in 2025, earliest 2028, realistically 2030.
- Time to parity: 5-10 years — and politically not available to Apple/NVIDIA.
What makes ASML special, and why this pillar is even tighter
If you want to understand TSMC, you have to understand ASML. Without ASML machines, TSMC can't fab leading-edge chips. And ASML only exists once. The core in 3 sentences, then the numbers.
EUV stands for "Extreme Ultraviolet": light with a 13.5-nanometer wavelength, because normal UV light (193 nm) is too "thick" to draw structures below 7 nanometers. Producing EUV light is absurdly hard: a CO2 laser fires 50,000 times per second at tiny tin droplets and ignites them into a plasma roughly 40 times hotter than the sun's surface. From that plasma, the light beam is steered through specialty mirrors (all patented ZEISS glass, polished to atomic precision) onto the chip wafer. Without it, you can't make chips below 7 nanometers.
A locomotive in a cleanroom — for $200 million.[12]
- Size of a locomotive, ~180 tons (NXE:3600D, current volume generation). The High-NA successor EXE:5200B in the image weighs from ~150 tons.
- Over 100,000 individual parts. 250 engineers take about 6 months to build a single machine.
- Shipping: 3 cargo Boeing 747s plus several trucks per NXE machine. For the High-NA EXE: one cargo plane plus trucks for about 250 separate crates.
- ~€170M per NXE machine. The High-NA successor (EXE:5200B in the image): ~€350M.
- 40 to 60 EUV machines per year is what ASML builds globally. Not per month. Per year.
+ The machine, opened up What actually happens inside an EUV machine — in six modules
Each of these modules is top-tier technology on its own. Only all six together make a machine that can fab structures below 5 nanometers. Anyone trying to copy ASML has to copy all six at once.
-
01
Light source
Cymer · USA · ASML subsidiary since 2013
A CO2 laser fires 50,000 times per second at tiny tin droplets. The droplets vaporize into a plasma — roughly 40 times hotter than the sun's surface. From that plasma comes the EUV beam at 13.5 nm wavelength.
-
02
Collector mirror
ZEISS SMT · Germany
The very first mirror behind the light source — it catches the EUV plasma light and focuses it into a usable beam. Coated with ~50 layers of molybdenum/silicon, each only a few atoms thick. Otherwise the mirror absorbs the EUV light instead of reflecting it.
-
03
Reticle / photomask
Photronics, DNP · Japan · specialized mask shops
The "print template" for the chip. A quartz plate carries the circuit pattern, four times larger than on the finished chip because the projection optics shrink the image. A single mask costs $250,000 to $500,000 and only works for one chip design.
-
04
Projection optics
ZEISS SMT · Germany
A system of 6 to 11 specialty mirrors that projects the reticle pattern onto the wafer and shrinks it 4×. Each mirror is polished to 0.1 nanometers of unevenness — scaled to the area of Germany, that's a maximum bump below 0.1 millimeters.
-
05
Wafer stage
ASML in-house · NL · plus VDL ETG (NL)
Moves the 300mm wafer in tracks under the light beam — up to 150 mm per second, with nanometer precision. The machine remeasures tens of thousands of times per second, corrects vibrations, compensates heat drift. Even light truck vibrations outside the building would be an exposure disaster.
-
06
Vacuum + control
ASML · ~44,000 employees, ~100,000 individual parts
EUV light is absorbed by air immediately. The entire optical path runs in high vacuum (~10⁻⁹ mbar — a billion times better than atmospheric pressure). More than 100,000 sensors regulate beam position, temperature, and mechanics in real time.
Six top-tier technologies in parallel. Patents aren't enough — the light source has to actually hold 50,000 plasma pulses per second stable, the mirrors have to actually be polished at atomic precision. If a single one of the six modules sits two classes below ASML level, there's no usable chip. That's the real moat.
Bottom line ASML + ZEISS ASML holds 100% EUV monopoly globally, ZEISS holds 100% of EUV optics exclusive to ASML — the two nodes before TSMC. If ZEISS breaks, ASML stops. If ASML stops, TSMC can't fab. The chain runs in one direction only, and it has no reserves.
DeeperWill China catch ASML? Bulls vs. bears, 5 to 5.
The EUV monopoly is the most provocative point in the whole thesis. If China or a consortium catches ASML, the single point of failure disappears. That's the optimistic read. The pessimistic one: nobody gets there in any foreseeable window. Both sides have hard arguments. The honest 5 against 5 below.
How likely is the break — really?
The median is the gray zone that's already running. Full war is the tail risk: low probability of occurrence, but if it hits, twice as hard as COVID. Three escalation scenarios are plausible, with a probability tendency over the 5-year window — deliberately as tendency, not point estimate. Serious sources avoid point estimates for exactly this reason (CFR 2026 puts a Cross-Strait crisis at >50%[8] without narrowing it further; CSIS wargames[6] stress that the hit rate depends on the behavior of individual actors).
Blockade / quarantine
- China doesn't need a win, just pressure — escalatable and de-escalatable in steps.
- Wargame history: across the 26 CSIS blockade games, escalation paths emerge repeatedly that are hard to contain[23].
- 2024-2025 the frequency of ADIZ exercises has risen in real terms, the escalation staircase is in place.
- Lloyd's war cover collapses immediately — China exports get caught in the same blast.
- US response within 72 hours highly likely (CSIS assumption).
- Without ASML equipment, China itself has no leading-edge chip supply.
Full invasion
- Burns 2023: Xi has ordered the PLA to be invasion-ready by 2027[32].
- CCP legitimacy is tied to "reunification" — domestic pressure rises.
- Stochastic escalation out of a naval incident is possible (see Hainan 2001).
- 83% of China experts consider invasion before 2030 unlikely; Pentagon: no fixed timeline order to Xi[9].
- Mark Liu (TSMC): "Nobody can control TSMC by force" — the fab is dead, the prize is zero.
- CSIS wargames: every scenario ends with Chinese losses above the threshold Xi can absorb.
Gray zone / status quo erosion
- Low-risk for China, nearly unattributable (submarine cable incidents are hard to prove).
- Erodes Taiwan's investment climate without crossing a military threshold.
- Escalation staircase stays open — can be stepped up to blockade.
- Immediate effect too weak for CCP domestic politics ("nothing achieved").
- Pushes the US and Japan into a harder defense alliance with Taiwan.
- Accelerates TSMC diversification (Arizona, Kumamoto, Dresden) — Silicon Shield erodes.
"Nobody can control TSMC by force. If you take a military force or invasion, you will render TSMC factory not operable, because this is such a sophisticated manufacturing facility." — Mark Liu, then TSMC chairman, CNN Fareed Zakaria GPS, July 31, 2022[10]
DeeperOther risks: earthquakes, cyber, IP theft — relevant, but not dominant.
Earthquake: April 3, 2024, magnitude 7.4 (USGS[36]; Taiwan CWA 7.2), the strongest quake in 25 years. TSMC: 70% tool recovery in 10 hours, EUV undamaged, full recovery after 3 days, Q2 margin hit only -50 basis points. TSMC has more experience with serious earthquakes than any other semiconductor fab — which is exactly why it's robust against them. Earthquakes aren't the main risk.
Cyber: WannaCry variant in 2018, $170M in damage, Q3 revenue -3%, recovery in days. But: a state-directed attack (China APT or North Korea Lazarus) on EUV control software would be a different game.
IP theft: China has been running systematic recruitment campaigns against TSMC engineers for years. Effect: SMIC reached 7nm, but not in TSMC quality. Slow erosion, no immediate damage.
Three personal anchors for the most likely of the three scenarios (global GDP −5%, ~$5 trillion in damage in the first year). For full invasion, the effect roughly doubles.
Why doesn't it escalate anyway? The incentives of all six actors.
The three scenarios above don't have a hard probability, because the probability of occurrence follows from the incentives of the actors. Each relevant actor holds a lever and carries a risk. Anyone who deviates unilaterally loses more than they win. That's the "Silicon Shield": not a property of any one chip, but an equilibrium of mutual incentives.
| Actor | What do they want? | Lever | Risk |
|---|---|---|---|
| USA Washington · Silicon Valley | Domestic capacity for leading-edge chips. Keep China behind on lithography. | Trump rolls back the CHIPS Act while tariffs simultaneously demand onshoring — pressure without incentive. | |
| China Beijing · Shanghai (SMEE) | Self-sufficiency. "Made in China 2025" target 70%, reality ~35%. | If they take Taiwan militarily, TSMC is dead. They don't have ASML equipment either. Their own EUV is years from volume production. | |
| Taiwan Taipei · Hsinchu | Hold the status quo. Lai Ching-te (DPP): TSMC is leverage and vulnerability at the same time. | KMT + TPP block Lai's defense budget. Silicon Shield erodes via Arizona investments (March 2025: another +$100B[28]). | |
| Netherlands / EU Veldhoven · Oberkochen | Protect ASML margins, signal EU sovereignty outward, avoid being ground up between US and China. |
|
Intel Magdeburg cancelled July 2025 (previously €30B investment planned)[31]. EU Chips Act delivered €13.75B vs. $33.7B in US grants. EU auditor: 20% target by 2030 "very unlikely". |
| NVIDIA Santa Clara | More CoWoS capacity, faster. Diversification as a hedge, no switch away from TSMC. |
|
Single point of failure Taiwan. NVIDIA sells Blackwell as fast as TSMC can build them. If TSMC tips, NVIDIA tips with it. |
| TSMC itself Hsinchu | Hold margins, sit out geopolitics, serve all major customers. No commitment as anyone's vassal. |
|
Arizona too big → Silicon Shield brittle. Arizona too small → Trump tariff. Taiwan falls → company dead anyway. |
Why the system holds, and what would break it
For · it holds
- Over $2 trillion in direct disruption + $1.6 trillion in annual revenue loss at chip consumers (Rhodium Group[2]): China needs TSMC chips itself.
- Mutually Assured Financial Destruction: a major Taiwan crisis would have financial consequences before the first shot is fired (CSIS "Scared Strait"[37]).
- A failed Taiwan invasion could destabilize CCP rule. Xi doesn't risk that in the economically weaker phase.
Against · it breaks
- Mark Liu's own statement: if invaded, the fab is dead. The threat works only before escalation, not during.
- Arizona drain: the more US fabs TSMC has, the smaller the marginal value of Hsinchu.
- Stochastic escalation: Hainan 2.0, a downed US recon plane, a rammed ship. The system is a fragile robustness — stable in the median, with thicker than in 2020.
Four concrete levers — hygiene, not panic.
When the shock arrives and Apple, NVIDIA, and your tool stack all wobble at once, only preparation helps. The concentration on TSMC, ASML, and Hsinchu came out of 40 years of efficiency logic, not bad intent. That's what makes it hard to unwind. Fixing the system isn't in your hands. Checking your own exposure is. Four levers, doable in a weekend.*
- 01 Multi-LLM strategy for your tools. Not only ChatGPT, not only Claude. At least two providers in parallel, so you can switch within days if rate limits or a price hike kick in. Cursor, Aider, and LibreChat make model switching relatively easy. Route three workflows per week deliberately to the second provider, so you don't have to learn it under stress. How I did this myself: setting up cloud with Antigravity.
- 02 Install local models as a hedge. Llama 3.3, Mistral, Qwen run on a Mac with 32 GB+ RAM or a 4090. Enough for roughly 70% of use cases. Not as the primary tool, but as a backup if cloud inference gets rationed. Once set up, it stays out of the way.
- 03 30-minute stress test on your stack. Take half an hour and go through the five tools you use daily. For each ask: if the provider introduces rate limits tomorrow or triples the price, what's my plan? Three classes: (a) backup ready, (b) can migrate in two weeks, (c) no idea what to do. Class (c) is the real tail-risk list. If you never wrote it down, you're surprised when it hits. And that part is avoidable.
- 04 Check stock concentration risk. If your portfolio holds AI or tech ETFs: look at the top 10. If NVDA + TSM + ASML + AAPL + AMD + AVGO combined exceed 30%, you have a concentrated semiconductor exposure you may not have signed up for consciously. In a TSMC outage, all of it correlates to the downside. What you do with that is your call, and your financial advisor's if you have one. This is the prompt to actually do the math once.
"We're screwed — if TSMC stops."
True — and more so than I thought going in. It isn't one company. Four single-source nodes wired in series: ZEISS, ASML, TSMC, Hsinchu. Each one without a real second source. If one breaks, the whole stack breaks at that level. Even the fastest catcher-up takes 2 to 3 years, the slowest 25 to 30 — a whole generation.
True — but less likely than most people think. Exactly because the US, China, and Taiwan all lose more than they win in a break, the equilibrium holds. That's why doomsday voices have been predicting the crash for years (decades, really), and why it hasn't happened so far. The system is a fragile robustness: stable in the median, with thicker than the last 20 years.
No reason to panic. But a reason to honestly look at your portfolio, tech stack, and watchlist once, before that Wednesday in April 2027 arrives.
* This article is editorial journalism, not investment advice. I'm not licensed by BaFin and don't make personal recommendations on securities. The levers are prompts for reflection — anyone moving real money or restructuring positions should bring in a licensed financial advisor.